An electrical power converter is used to convert power from an unregulated power source (e.g., rectified AC Mains, or 48 V battery) to a regulated output voltage usable by a particular application, such as a digital integrated circuit using a 5 V power supply. The majority of such power converters employ a power transformer to isolate the output voltage from the input power supply. For efficiency, these power transformers are driven at high frequency, such as for example 50 kHz to 500 kHz, by power transistors, typically power MOSFET transistors. A pulse width modulation (PWM) control circuit is generally used to regulate the output voltage of the converter by varying the pulse width of the drive signals coupled to the power transistors. The PWM control circuit is often required to be isolated from the power transistors for reasons of safety and/or circuit function. For each power transistor, a signal transformer (also called an isolation transformer) is normally used to transmit the control waveform from the PWM control circuit to the power transistor.
A common prior art transistor drive circuit using such an isolation transformer is shown at 10 in FIG. 1. Key voltages of drive circuit 10 are shown at a timing diagram 20 in FIG. 2. Drive circuit 10 is coupled between a PWM control circuit 12 and a MOSFET power transistor Q.sub.SW, and includes a transformer T.sub.1, a first capacitor C.sub.1, a second capacitor C.sub.2, and a diode D.sub.1. The output of control circuit 12 is provided at a node A and the voltage at node A is shown as a function of time at a timing graph 21 in FIG. 2. A 30% duty-cycle and a pulse height of 10 V are shown for the control signal at node A. First capacitor C.sub.1 is coupled between control circuit 12 and the primary winding of transformer T.sub.1 and is for blocking the application of a D.C. voltage to transformer T.sub.1. As is known in the transformer art, the application of a DC voltage to a transformer winding causes the transformer to saturate, which often leads to damage or destruction of the transformer if the voltage is applied for a sufficient duration. Capacitor C.sub.1 blocks the D.C. voltage and level shifts the waveform at node A such that an alternating voltage is seen by transformer T.sub.1 at a node B, which couples T.sub.1 and C.sub.1. The voltage at node B is shown at 22 in FIG. 2. The waveform at node A is shifted at node B such that the average volt-seconds applied to the primary winding of transformer T.sub.1 is substantially zero. As an example, for a 10 V pulse height at node A with a 30% duty cycle, a positive pulse height of 7 V and a negative pulse height of -3 V appear at node B.
The waveform at node B is "D.C. restored" by capacitor C.sub.2 and diode D.sub.1 at a node C. Capacitor C.sub.2 and diode D.sub.l are coupled in series at node C, and the series combination is coupled across the secondary winding of transformer T.sub.1. Diode D.sub.1 is orientated such that it may conduct current into the positive terminal of the secondary winding. The cathode of diode D.sub.1 provides a ground reference for the secondary circuit of drive circuit 10. Power transistor Q.sub.SW is coupled across diode D.sub.1, with its source terminal coupled to the anode of D.sub.1 and its gate terminal coupled to the cathode. The voltage at node B is replicated to the secondary winding of T.sub.1 by transformer action. The secondary voltage is coupled to node C by capacitor C.sub.2, with diode D.sub.1 setting the negative pulse height to -0.5 V by forward conduction. This causes the positive pulse height to be restored to a value of 9.5 V, near to the original 10 V value. The waveform at node C is shown at a graph 23 in FIG. 2.
Transistor drive circuit 10 provides good isolation between control circuitry 10 and transistor Q.sub.SW with reasonable efficiency. However, because of stored energy in capacitors C.sub.1 and C.sub.2, drive circuit 10 has difficulty in cleanly turning off transistor Q.sub.SW when the power converter terminates operation. Whenever the power converter is turned off or the load removed from the converter's output, control circuitry 10 stops generating the pulsed signal at node A, with the output at node A being held low near zero volts. This is shown at t.sub.0 in FIG. 2. At time to, the voltage across the secondary winding of T.sub.1 is -3 V and the gate-to-source voltage of Q.sub.SW is approximately -0.5 V, due to the forward voltage drop across D.sub.1. The magnetizing inductance of transformer T.sub.1, which stores magnetic energy as described below in greater detail, begins to resonate with capacitor C.sub.1. Without any damping in the primary or secondary circuits, this resonance causes the secondary winding voltage to swing from -3 V to +3 V, back to -3 V at a frequency relatively slow in comparison to the previous switching frequency of the control signal. This is shown in graph 22 for time greater than t.sub.0. The gate-to-source voltage of transistor Q.sub.SW tracks the secondary winding voltage and swings from -0.5 V to +5.5 V, back to -0.5 V, as shown in graph 23.
As transistor Q.sub.SW has a threshold voltage in the range of +3 V to 5 V, Q.sub.SW is turned on by the resonance even though control circuit 12 has set its output at node A to a low state. If transistor Q.sub.SW is coupled to a power transformer of a power converter, as is often the case, it will couple power and voltage to the converter's power transformer for a relatively long period of time. This results in the power transformer saturating, with unlimited current flowing into the power transformer. As a consequence, damage to the power transformer and possibly to other components of the power converter may occur.
The prior art has addressed this problem by coupling a damping resistor in parallel across either the signal transformer T.sub.1 or the gate and source terminals of transistor Q.sub.SW. Unfortunately, this approach has two drawbacks. First, by introducing a dissipation path, it reduces the efficiency of drive circuit 10. Second, and more importantly, small resistance (high conductance) values are generally needed to critically damp or over damp the resonating circuit in order to be effective. However, the small resistance values lead to excessive power dissipation. Increasing the resistance to achieve more moderate power dissipation levels unfortunately leads to an under-damped resonating circuit and, consequently, to a circuit which has the above shut-off problem. Thus, in solving the resonance problem, the prior art approach has created a new problem of high power dissipation and resultant reduced power efficiency.